Processor Testing Software by Implementing Rapid Self-test Technique

Authors

  • Santi Swarup Basa
  • Debashis Pradhan
  • Lipsa Das
  • Abhaya Kumar Panda
  • Santosh Kumar Swain

Abstract

Less Complex and rapid software-based self-test (SBST) methods are frequently used for evaluating contemporary processors due to the simplicity of synthesis using developmental methods, coverage for hard to check faults, non-invasive, small hardware overheads and alike. Moreover, the amount of time it takes for the SBST test synthesis is high. In this paper, an extension of the SBST method known as Rapid SBST (RSBST) is suggested; this decreases general sample synthesis speed by reprocessing simulation answers from current sample programs of the same observability. Test instructions, created expending the evolutionary process, which generates comparable fault simulation outcomes, are reprocessed for fault assessment.  The proposed system utilizes the re-processing to increase the speed and promptness of the sample synthesis. The implemented RSBST methodology accelerates by an influence of “1.35” though preserving a fault of “1.35” and retaining a fault coverage above “96.2” percent.

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Published

2020-02-26

Issue

Section

Articles