IP Creation for Reduced Wallace Tree Multiplier using Reversible Kogge Stone Adder

Abstract

A multiplier is the most important block in the many cryptography and DSP applications. Multiplier is the main source of power dissipationin digital system. In order to improve the performance of DSP circuits and systems, an efficient multiplier is required.Multipliers based on Wallace reduction tree provide an area-efficient strategy for high speed multiplication. An efficient way to reduce area and power of Wallace tree multiplier is by use of reverse pyramid structure which reduces the number of half adders and full adders compared to Standard Wallace tree multiplier. In this paper, a Reduced Wallace tree multiplier with reversible logic based Kogge stone adder is proposed. The Kogge stone adder is a faster adder. The proposed Multiplier is synthesized, and an IP is created using Vivado2016.2. The proposed design reduces 8% of power compared to Standard Wallace tree multiplier with Kogge Stone.